The SDR-LW 2974 is a high-performance embedded SDR standalone device that is an ideal prototype for building a range of advanced research applications, including standalone LTE or 802.11 device simulation, development of media access control (MAC) algorithms, multiple input multiple output (MIMO) systems, heterogeneous networks, LTE transmissions, RF compressed sampling, spectral remote sensing, cognitive radio, beamforming, and direction finding.
SDR-LW 2974
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i7 processor
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Equipped with a Linux real-time operating system
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Four USB 3.0 ports
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JTAG interface
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PCIe Gen x4 interface
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Dual SFP+ ports
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500GB SSD, 16GB RAM
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Frequency coverage from 10MHz to 6GHz
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Built-in Xilinx Kintex-7 FPGA
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Support for external reference clock and PPS signal reference.
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Supports 2 transmitters and 2 receivers, with an instantaneous bandwidth of up to 160MHz for each channel.
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RFNoC FPGA Development Framework
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Support GNU Radio
Product introduction
Technical parameter
| Transmit | Receive | ||
| Number of Channels | 2 | Number of Channels | 2 |
| Frequency Range | 10MHz~6GHz | Frequency Range | 10MHz~6GHz |
| Frequency Step | <1kHz | Frequency Step | <1kHz |
| Maximum Output Power | 19.5dBm | Maximum Input Power | -15dBm |
| Gain Range | 0~31.5dB | Gain Range | 0~31.5dB |
| Gain Step | 0.5dB | Gain Step | 0.5dB |
| Maximum Real-time Bandwidth | 160MHz | Maximum Real-time Bandwidth | 160MHz |
| FPGA and Baseband | |||
| FPGA | Kintex-7 XC7K410T | Processor | I7 9700 |
| DRAM | 1G | Memory | 16G |
| ADC Resolution | 14 bits | SFP (10G Network) | 10Gbps |
| DAC Resolution | 16 bits | PCIe Card | PCIe Gen 2 x4 |
| ADC Sampling Rate | 200 MSps | RJ45 | 1Gbps |
| Environment | |||
| Operating Temperature | 0~50°C | Humidity | 10%~90% (non-condensing) |
| Physical Properties | |||
| Dimensions | 23.5×26.5×13.5 cm | Weight | 3.6Kg |